Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9513917 | Vector friendly instruction format and execution thereof | Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more | 2016-12-06 |
| 9477441 | Double rounded combined floating-point multiply and add | Grigorios Magklis, Marc Lupon, David R. Ditzel | 2016-10-25 |
| 9389871 | Combined floating point multiplier adder with intermediate rounding logic | Marc Lupon, Grigorios Magklis, Raul Martinez, Kyriakos A. Stavrou, Enric Gibert Codina | 2016-07-12 |
| 9329848 | Mechanism for facilitating dynamic and efficient fusion of computing instructions in software programs | Marc Lupon, Raul Martinez, Enric Gibert Codina, Kyriakos A. Stavrou, Grigorios Magklis | 2016-05-03 |