Issued Patents 2016
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524168 | Apparatus and method for shuffling floating point or integer values | Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Tal Uliel, Bret L. Toll | 2016-12-20 |
| 9519324 | Local power gate (LPG) interfaces for power-aware operations | Michael Mishaeli, Ron Gabor, Alex Gerber, Zeev Sperber | 2016-12-13 |
| 9513918 | Apparatus and method for performing permute operations | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Jesus Corbal, Bret L. Toll, Mark J. Charney +3 more | 2016-12-06 |
| 9513917 | Vector friendly instruction format and execution thereof | Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll, Santiago Galan Duran +14 more | 2016-12-06 |
| 9513871 | Floating point round-off amount determination processors, methods, systems, and instructions | Cristina S. Anderson, Bret L. Toll, Simon Rubanovich, Amit Gradstein | 2016-12-06 |
| 9495162 | Apparatus and method for performing a permute operation | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Jesus Corbal, Tal Uliel, Zeev Sperber +1 more | 2016-11-15 |
| 9489196 | Multi-element instruction with different read and write masks | Mikhail Plotnikov, Andrey Naraikan, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Jesus Corbal | 2016-11-08 |
| 9483266 | Fusible instructions and logic to provide OR-test and AND-test functionality using multiple test sources | Maxim Loktyukhin, Julian Horn, Mark J. Charney | 2016-11-01 |
| 9459865 | Systems, apparatuses, and methods for performing a butterfly horizontal and cross add or substract in response to a single instruction | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Amit Gradstein, Simon Rubanovich, Zeev Sperber | 2016-10-04 |
| 9448795 | Limited range vector memory access instructions, processors, methods, and systems | Elmoustapha Ould-Ahmed-Vall | 2016-09-20 |
| 9448765 | Floating point scaling processors, methods, systems, and instructions | Christina Anderson, Amit Gradstein, Simon Rubanovich, Benny Eitan | 2016-09-20 |
| 9442733 | Packed data operation mask comparison processors, methods, systems, and instructions | Bret L. Toll, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney | 2016-09-13 |
| 9442731 | Packed two source inter-element shift merge processors, methods, systems, and instructions | Tal Uliel, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney, Thomas Willhalm | 2016-09-13 |
| 9424327 | Instruction execution that broadcasts and masks data values at different levels of granularity | Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Bret L. Toll, Mark J. Charney | 2016-08-23 |
| 9411584 | Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality | Christopher J. Hughes, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Brett L. Toll, Mark J. Charney +1 more | 2016-08-09 |
| 9411592 | Vector address conflict resolution with vector population count functionality | Mark J. Charney, Jesus Corbal, Milind B. Girkar, Christopher J. Hughes, Elmoustapha Ould-Ahmed-Vall +1 more | 2016-08-09 |
| 9405539 | Providing vector sub-byte decompression functionality | Tal Uliel, Elmoustapha Ould-Ahmed-Vall, Thomas Willhalm | 2016-08-02 |
| 9396056 | Conditional memory fault assist suppression | Zeev Sperber, Offer Levy, Michael Mishaeli, Gal Ofir | 2016-07-19 |
| 9372692 | Methods, apparatus, instructions, and logic to provide permute controls with leading zero count functionality | Christopher J. Hughes, Mikhail Plotnikov, Andrey Naraikin | 2016-06-21 |
| 9361116 | Apparatus and method for low-latency invocation of accelerators | Oren Ben-Kiki, Ilan Pardo, Eliezer Weissmann, Dror Markovich, Yuval Yosef | 2016-06-07 |
| 9354877 | Systems, apparatuses, and methods for performing mask bit compression | Bret L. Toll, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney | 2016-05-31 |
| 9336000 | Instruction execution unit that broadcasts data values at different levels of granularity | Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Bret L. Toll, Mark J. Charney | 2016-05-10 |
| 9323531 | Systems, apparatuses, and methods for determining a trailing least significant masking bit of a writemask register | Christopher J. Hughes, Mark J. Charney, Jesus Corbal, Milind B. Girkar, Elmoustapha Ould-Ahmedvall +1 more | 2016-04-26 |
| 9244677 | Loop vectorization methods and apparatus | Nalini Vasudevan, Jayashankar Bharadwaj, Christopher J. Hughes, Milind B. Girkar, Mark J. Charney +4 more | 2016-01-26 |
| 9244687 | Packed data operation mask comparison processors, methods, systems, and instructions | Bret L. Toll, Jesus Corbal San Adrian, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney | 2016-01-26 |