Issued Patents 2016
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9406562 | Integrated circuit and design structure having reduced through silicon via-induced stress | Jeffrey P. Bonn, Brent A. Goplen, Robert M. Rassel, Edmund J. Sprogis, Daniel S. Vanslette | 2016-08-02 |