Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8020134 | Method and apparatus for parallel processing of semiconductor chip designs | Michael W. Dotson, Anthony DeGroff Drumm, Dazhuang J. Ma, Ruchir Puri | 2011-09-13 |
| 7996812 | Method of minimizing early-mode violations causing minimum impact to a chip design | Pooja M. Kotecha, Frank J. Musante, Veena S. Pureswaran, Paul G. Villarrubia | 2011-08-09 |
| 7930669 | Stage mitigation of interconnect variability | Mark A. Lavin, Ruchir Puri, Hua Xiang | 2011-04-19 |
| 7900182 | Method and system for designing an electronic circuit | Anthony D. Drumm, Lakshmi N. Reddy | 2011-03-01 |
| 7895556 | Method for optimizing an unrouted design to reduce the probability of timing problems due to coupling and long wire routes | Pooja M. Kotecha, David J. Hathaway | 2011-02-22 |