Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8053819 | Three-dimensional cascaded power distribution in a semiconductor device | Kerry Bernstein, Paul W. Coteus, Philip G. Emma, Allan M. Hartstein, Stephen V. Kosonocky +1 more | 2011-11-08 |
| 8020134 | Method and apparatus for parallel processing of semiconductor chip designs | Michael W. Dotson, Anthony DeGroff Drumm, Dazhuang J. Ma, Louise H. Trevillyan | 2011-09-13 |
| 8010926 | Clock power minimization with regular physical placement of clock repeater components | Charles J. Alpert, Shyam Ramji, Ashish Singh, Chin Ngai Sze | 2011-08-30 |
| 7930669 | Stage mitigation of interconnect variability | Mark A. Lavin, Louise H. Trevillyan, Hua Xiang | 2011-04-19 |
| 7913202 | Wafer level I/O test, repair and/or customization enabled by I/O layer | Kerry Bernstein, Paul W. Coteus, Ibrahim M. Elfadel, Philip G. Emma, Daniel J. Friedman +3 more | 2011-03-22 |