Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8017471 | Structure and method of latchup robustness with placement of through wafer via within CMOS circuitry | Phillip F. Chapman, Steven H. Voldman | 2011-09-13 |
| 8008748 | Deep trench varactors | Robert M. Rassel, Eric Thompson | 2011-08-30 |
| 7968975 | Metal wiring structure for integration with through substrate vias | Alvin J. Joseph, Peter J. Lindgren, Anthony K. Stamper, Kimball M. Watson | 2011-06-28 |
| 7943445 | Asymmetric junction field effect transistor | Frederick G. Anderson, Richard A. Phelps, Robert M. Rassel, Michael J. Zierak | 2011-05-17 |
| 7868423 | Optimized device isolation | John Benoit, Natalie B. Feilchenfeld, Michael L. Gautsch, Xuefeng Liu, Robert M. Rassel +2 more | 2011-01-11 |