PC

Paul A. Clifton

AT Acorn Technologies: 3 patents #2 of 5Top 40%
📍 Palo Alto, CA: #141 of 1,511 inventorsTop 10%
🗺 California: #2,795 of 41,698 inventorsTop 7%
Overall (2011): #23,349 of 364,097Top 7%
4
Patents 2011

Issued Patents 2011

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
8003486 Method of making a semiconductor device having a strained semiconductor active region using edge relaxation, a buried stressor layer and a sacrificial stressor layer R. Stockton Gaines, Daniel J. Connelly 2011-08-23
7977147 Strained silicon with elastic edge relaxation 2011-07-12
7972916 Method of forming a field effect transistors with a sacrificial stressor layer and strained source and drain regions formed in recesses Daniel J. Connelly, R. Stockton Gaines 2011-07-05
7902029 Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor Daniel E. Grupp, Daniel J. Connelly, Carl M. Faulkner 2011-03-08