Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7902029 | Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor | Daniel J. Connelly, Paul A. Clifton, Carl M. Faulkner | 2011-03-08 |
| 7883980 | Insulated gate field effect transistor having passivated schottky barriers to the channel | Daniel J. Connelly | 2011-02-08 |
| 7884003 | Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions | Daniel J. Connelly | 2011-02-08 |