Issued Patents 2005
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6965158 | Multi-layer substrates and fabrication processes | John W. Smith | 2005-11-15 |
| 6940158 | Assemblies having stacked semiconductor chips and methods of making same | Masud Beroz | 2005-09-06 |
| 6933610 | Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby | Para K. Segaram, Joseph Fjelstad | 2005-08-23 |
| 6921713 | Semiconductor chip package with interconnect structure | John W. Smith | 2005-07-26 |
| 6902953 | Methods of forming semiconductor stacked die devices | — | 2005-06-07 |
| 6898085 | Multiple channel modules and bus systems using same | Richard E. Perego, David Nguyen, Billy Wayne Garrett, Jr., Ely Tsern, Craig E. Hampel +1 more | 2005-05-24 |
| 6891272 | Multi-path via interconnection structures and methods for manufacturing the same | Joseph Fjelstad | 2005-05-10 |
| 6884120 | Array connector with deflectable coupling structure for mating with other components | Para K. Segaram, Joseph Fjelstad | 2005-04-26 |
| 6870246 | Method and apparatus for providing an integrated circuit cover | Donald R. Mullen, Ming Li | 2005-03-22 |
| 6853557 | Multi-channel memory architecture | Sayeh Khalili, Donald R. Mullen, Nader Gamini | 2005-02-08 |
| 6848173 | Microelectric packages having deformed bonded leads and methods therefor | Joseph Fjelstad, Masud Beroz, John W. Smith | 2005-02-01 |