Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963956 | Apparatus and method for pipelined memory operations | Richard M. Barth, Mark A. Horowitz, Donald C. Stark, Craig E. Hampel, Frederick A. Ware +1 more | 2005-11-08 |
| 6961831 | Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2005-11-01 |
| 6934201 | Asynchronous, high-bandwidth memory component using calibrated timing elements | Frederick A. Ware, Craig E. Hampel, Donald C. Stark | 2005-08-23 |
| 6920540 | Timing calibration apparatus and method for a memory device signaling system | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Fredrick A. Ware | 2005-07-19 |
| 6898085 | Multiple channel modules and bus systems using same | Belgacem Haba, Richard E. Perego, David Nguyen, Billy Wayne Garrett, Jr., Craig E. Hampel +1 more | 2005-05-24 |
| 6842864 | Method and apparatus for configuring access times of memory devices | Richard M. Barth, Craig E. Hampel, Frederick A. Ware, Todd Bystrom, Bradley A. May +1 more | 2005-01-11 |
| 6839266 | Memory module with offset data lines and bit line swizzle configuration | Billy Wayne Garrett, Jr., Frederick A. Ware, Craig E. Hampel, Richard M. Barth, Don Stark +4 more | 2005-01-04 |