Issued Patents 2005
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6967125 | Quad flat no lead (QFN) grid array package, method of making and memory module and computer system including same | Setho Sing Fee | 2005-11-22 |
| 6951777 | Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate | Setho Sing Fee, Tay Wuu Yean | 2005-10-04 |
| 6951982 | Packaged microelectronic component assemblies | Setho Sing Fee, Eric Tan Swee Seng | 2005-10-04 |
| 6943450 | Packaged microelectronic devices and methods of forming same | Setho Sing Fee, Eric Tan Swee Seng | 2005-09-13 |
| 6906415 | Semiconductor device assemblies and packages including multiple semiconductor devices and methods | Tongbi Jiang, Setho Sing Fee, Tay Wuu Yean | 2005-06-14 |
| 6876066 | Packaged microelectronic devices and methods of forming same | Setho Sing Fee, Eric Tan Swee Seng | 2005-04-05 |
| 6870247 | Interposer with a lateral recess in a slot to facilitate connection of intermediate conductive elements to bond pads of a semiconductor die with which the interposer is assembled | Setho Sing Fee, Tay Wuu Yean | 2005-03-22 |
| 6864166 | Method of manufacturing wire bonded microelectronic device assemblies | Leng Nam Yin | 2005-03-08 |