Issued Patents 2005
Showing 1–25 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6979857 | Apparatus and method for split gate NROM memory | — | 2005-12-27 |
| 6979855 | High-quality praseodymium gate dielectrics | Kie Y. Ahn | 2005-12-27 |
| 6979607 | Technique to control tunneling currents in DRAM capacitors, cells, and devices | Salman Akram | 2005-12-27 |
| 6980033 | Pseudo CMOS dynamic logic with delayed clocks | — | 2005-12-27 |
| 6976300 | Integrated circuit inductors | Kie Y. Ahn | 2005-12-20 |
| 6975531 | 6F2 3-transistor DRAM gain cell | — | 2005-12-13 |
| 6972599 | Pseudo CMOS dynamic logic with delayed clocks | — | 2005-12-06 |
| 6970021 | Low voltage comparator | — | 2005-11-29 |
| 6970053 | Atomic layer deposition (ALD) high permeability layered magnetic films to reduce noise in high speed interconnection | Salman Akram, Kie Y. Ahn | 2005-11-29 |
| 6970370 | Ferroelectric write once read only memory for archival storage | — | 2005-11-29 |
| 6964903 | Method of fabricating a transistor on a substrate to operate as a fully depleted structure | Wendell P. Noble | 2005-11-15 |
| 6965123 | Transistor with variable electron affinity gate and methods of fabrication and use | Kie Y. Ahn | 2005-11-15 |
| 6963103 | SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators | — | 2005-11-08 |
| 6962866 | System-on-a-chip with multi-layered metallized through-hole interconnection | Kie Y. Ahn | 2005-11-08 |
| 6960538 | Composite dielectric forming methods and composite dielectrics | Kie Y. Ahn | 2005-11-01 |
| 6960821 | Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction | Wendell P. Noble, Alan R. Reinberg | 2005-11-01 |
| 6958937 | DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators | — | 2005-10-25 |
| 6958302 | Atomic layer deposited Zr-Sn-Ti-O films using TiI4 | Kie Y. Ahn | 2005-10-25 |
| 6956772 | Programmable fuse and antifuse and method thereof | — | 2005-10-18 |
| 6956908 | Technique to simultaneously distribute clock signals and data on integrated circuits, interposers, and circuit boards | — | 2005-10-18 |
| 6956256 | Vertical gain cell | — | 2005-10-18 |
| 6955968 | Graded composition gate insulators to reduce tunneling barriers in flash memory devices | Jerome M. Eldridge | 2005-10-18 |
| 6953375 | Manufacturing method of a field emission display having porous silicon dioxide insulating layer | Kie Y. Ahn | 2005-10-11 |
| 6953996 | Low-loss coplanar waveguides and method of fabrication | Kie Y. Ahn | 2005-10-11 |
| 6953730 | Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics | Kie Y. Ahn | 2005-10-11 |