Issued Patents 2005
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6975027 | Multi-chip electronic package and cooling system | Paul A. Farrar | 2005-12-13 |
| 6958287 | Micro C-4 semiconductor die | Paul A. Farrar | 2005-10-25 |
| 6955968 | Graded composition gate insulators to reduce tunneling barriers in flash memory devices | Leonard Forbes | 2005-10-18 |
| 6953706 | Method of providing a semiconductor package having an internal heat-activated hydrogen source | Paul A. Farrar | 2005-10-11 |
| 6952032 | Programmable array logic or memory devices with asymmetrical tunnel barriers | Leonard Forbes, Kie Y. Ahn | 2005-10-04 |
| 6935355 | Small scale actuators and methods for their formation and use | — | 2005-08-30 |
| 6912778 | Methods of fabricating full-wafer silicon probe cards for burn-in and testing of semiconductor devices | Kie Y. Ahn, Leonard Forbes | 2005-07-05 |
| 6909171 | Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture | Paul A. Farrar | 2005-06-21 |
| 6908827 | Perovskite-type material forming methods, capacitor dielectric forming methods, and capacitor constructions | — | 2005-06-21 |
| 6902984 | Methods of forming void regions, dielectric regions and capacitor constructions | — | 2005-06-07 |
| 6897513 | Perovskite-type material forming methods, capacitor dielectric forming methods, and capacitor constructions | — | 2005-05-24 |
| 6888232 | Semiconductor package having a heat-activated source of releasable hydrogen | Paul A. Farrar | 2005-05-03 |
| 6878396 | Micro C-4 semiconductor die and method for depositing connection sites thereon | Paul A. Farrar | 2005-04-12 |
| 6861287 | Multiple chip stack structure and cooling system | Paul A. Farrar | 2005-03-01 |
| 6861727 | Antifuse structures, methods, and applications | Leonard Forbes | 2005-03-01 |