Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6941533 | Clock tree synthesis with skew for memory devices | Alexander E. Andreev, Igor Vikhliantsev | 2005-09-06 |
| 6901571 | Timing-driven placement method utilizing novel interconnect delay model | Dusan Petranovic, Ranko Scepanovic | 2005-05-31 |