Issued Patents 2005
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6974736 | Method of forming FET silicide gate structures incorporating inner spacers | Victor Ku, An Steegen, Keith Kwong Hon Wong | 2005-12-13 |
| 6975133 | Logic circuits having linear and cellular gate transistors | Victor Wing Chung Chan, Shih-Fen Huang, Oleg Gluschenkov | 2005-12-13 |
| 6936522 | Selective silicon-on-insulator isolation structure and method | An Steegen, Maheswaran Surendra, Ying Zhang, Franz Zach, Robert C. Wong | 2005-08-30 |