Issued Patents 2005
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6870255 | Integrated circuit wiring architectures to support independent designs | David Overhauser, Akira Fujimura | 2005-03-22 |
| 6858935 | Simulating euclidean wiring directions using manhattan and diagonal directional wires | David Overhauser, Akira Fujimura | 2005-02-22 |
| 6859916 | Polygonal vias | Andrew Caldwell | 2005-02-22 |
| 6858939 | Integrated circuit diagonal wiring architectures with zag conductors | David Overhauser, Akira Fujimura | 2005-02-22 |
| 6858928 | Multi-directional wiring on a single metal layer | David Overhauser, Akira Fujimura | 2005-02-22 |
| 6857117 | Method and apparatus for producing a circuit description of a design | Asmus Hetzel | 2005-02-15 |
| 6857112 | Method and apparatus for performing extraction using machine learning | Arindam Chatterjee | 2005-02-15 |
| 6854098 | Method and apparatus for performing technology mapping | Asmus Hetzel | 2005-02-08 |
| 6854101 | Method and arrangement for extracting capacitance in integrated circuits having non Manhattan wiring | Arindam Chatterjee | 2005-02-08 |
| 6854097 | Method and apparatus for performing technology mapping | Asmus Hetzel | 2005-02-08 |
| 6848091 | Partitioning placement method and apparatus | Joseph L. Ganley | 2005-01-25 |
| 6848086 | Method and apparatus for performing technology mapping | Asmus Hetzel | 2005-01-25 |