JG

Joseph L. Ganley

CS Cadence Design Systems: 4 patents #9 of 77Top 15%
📍 Herndon, VA: #1 of 38 inventorsTop 3%
🗺 Virginia: #36 of 1,679 inventorsTop 3%
Overall (2005): #11,768 of 245,428Top 5%
4
Patents 2005

Issued Patents 2005

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6910198 Method and apparatus for pre-computing and using placement costs within a partitioned region for multiple wiring models Steven Teig 2005-06-21
6907593 Method and apparatus for pre-computing attributes of routes Steven Teig 2005-06-14
6904580 Method and apparatus for pre-computing placement costs Steven Teig 2005-06-07
6848091 Partitioning placement method and apparatus Steven Teig 2005-01-25