AC

Arindam Chatterjee

CS Cadence Design Systems: 9 patents #3 of 77Top 4%
📍 Saratoga, CA: #5 of 352 inventorsTop 2%
🗺 California: #191 of 26,868 inventorsTop 1%
Overall (2005): #1,613 of 245,428Top 1%
9
Patents 2005

Issued Patents 2005

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
6961914 Method and apparatus for selecting input points to train a machine learning model for extraction Steven Teig 2005-11-01
6941531 Method and apparatus for performing extraction on an integrated circuit design Steven Teig 2005-09-06
6925618 Method and apparatus for performing extraction on an integrated circuit design with support vector machines Steven Teig 2005-08-02
6907591 Method and apparatus for performing extraction using a neural network Steven Teig 2005-06-14
6892366 Method and apparatus for performing extraction using a model trained with Bayesian inference via a Monte Carlo method Steven Teig 2005-05-10
6883148 Method and apparatus for creating an extraction model using Bayesian inference Steven Teig 2005-04-19
6880138 Method and apparatus for creating a critical input space spanning set of input points to train a machine learning model for extraction Steven Teig 2005-04-12
6857112 Method and apparatus for performing extraction using machine learning Steven Teig 2005-02-15
6854101 Method and arrangement for extracting capacitance in integrated circuits having non Manhattan wiring Steven Teig 2005-02-08