RR

Rob A. Rutenbar

CS Cadence Design Systems: 3 patents #10 of 77Top 15%
📍 Pittsburgh, PA: #14 of 375 inventorsTop 4%
🗺 Pennsylvania: #189 of 4,560 inventorsTop 5%
Overall (2005): #17,569 of 245,428Top 8%
3
Patents 2005

Issued Patents 2005

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6957400 Method and apparatus for quantifying tradeoffs for multiple competing goals in circuit design Hongzhou Liu, Rodney Phelps 2005-10-18
6918102 Method and apparatus for exact relative positioning of devices in a semiconductor circuit layout Regis Colwell, Elias Lee Fallon 2005-07-12
6874133 Integrated circuit design layout compaction method Prakash Gopalakrishnan, Elias Lee Fallon 2005-03-29