Issued Patents 2005
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6967873 | Memory device and method using positive gate stress to recover overerased cell | Zhizheng Liu, Mark Randolph, Yi He, Edward Hsia, Kulachet Tanpairoj +2 more | 2005-11-22 |
| 6956768 | Method of programming dual cell memory device to store multiple data states per cell | Kulachet Tanpairoj, Edward Hsia, Yi He | 2005-10-18 |
| 6944057 | Method to obtain temperature independent program threshold voltage distribution using temperature dependent voltage reference | Edward Franklin Runnion, Tien-Chun Yang, Binh Quang Le, Shigekazu Yamada, Ming-Huei Shieh +2 more | 2005-09-13 |
| 6901010 | Erase method for a dual bit memory cell | Eric M. Ajimine, Binh Quang Le, Edward Hsia, Ken Tanpairoj | 2005-05-31 |
| 6897110 | Method of protecting a memory array from charge damage during fabrication | Yi He, Wei Zheng, Zhizheng Liu, Mark Randolph, Ken Tanpairoj | 2005-05-24 |