Issued Patents 2004
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6835967 | Semiconductor diodes with fin structure | Yee-Chia Yeo | 2004-12-28 |
| 6800516 | Electrostatic discharge device protection structure | Yi-Ling Chan, Yi-Ming Sheu | 2004-10-05 |
| 6784071 | Bonded SOI wafer with <100> device layer and <110> substrate for performance improvement | Haur-Ywh Chen, Yi-Ling Chan, Kuo-Nan Yang, Chenming Hu | 2004-08-31 |
| 6720619 | Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices | Hao Chen, Yee-Chia Yeo, Chenming Hu | 2004-04-13 |
| 6703271 | Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer | Yee-Chia Yeo, Chun-Chieh Lin, Chen Ming Hu | 2004-03-09 |
| 6703187 | Method of forming a self-aligned twin well structure with a single mask | Yi-Ming Sheu | 2004-03-09 |
| 6686255 | Amorphizing ion implant local oxidation of silicon (LOCOS) method for forming an isolation region | Chi-Ming Yang | 2004-02-03 |
| 6674130 | High performance PD SOI tunneling-biased MOSFET | Kuo-Nan Yang, Yi-Ling Chan, You-Lin Chu, Hou-Yu Chen, Chenming Hu | 2004-01-06 |