Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6834378 | System on a chip bus with automatic pipeline stage insertion for timing closure | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-12-21 |
| 6826656 | Reducing power in a snooping cache based multiprocessor environment | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-11-30 |
| 6826747 | System and method for tracing program instructions before and after a trace triggering event within a processor | Victor Roberts Augsburg, Jeffrey Todd Bridges, Thomas Kevin Collopy, Thomas Andrew Sartorius | 2004-11-30 |
| 6807608 | Multiprocessor environment supporting variable-sized coherency transactions | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-10-19 |