Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6834378 | System on a chip bus with automatic pipeline stage insertion for timing closure | Victor Roberts Augsburg, James Norris Dieffenderfer, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius | 2004-12-21 |
| 6826656 | Reducing power in a snooping cache based multiprocessor environment | Victor Roberts Augsburg, James Norris Dieffenderfer, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius | 2004-11-30 |
| 6823411 | N-way psuedo cross-bar having an arbitration feature using discrete processor local busses | Richard Gerard Hofmann | 2004-11-23 |
| 6807608 | Multiprocessor environment supporting variable-sized coherency transactions | Victor Roberts Augsburg, James Norris Dieffenderfer, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius | 2004-10-19 |