Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825053 | Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS | Tie Jiang Wu, Chien-Chang Huang, Yu-Wei Ting | 2004-11-30 |
| 6812487 | Test key and method for validating the doping concentration of buried layers within a deep trench capacitors | Tie Jiang Wu, Chien-Chang Huang, Yu-Wei Ting, Tse-Main Kuo | 2004-11-02 |
| 6790735 | Method of forming source/drain regions in semiconductor devices | Hui-Min Mao, Sheng-Tsung Chen, Yi-Nan Chen, Chih-Yuan Hsiao | 2004-09-14 |
| 6693834 | Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices | Tie Jiang Wu, Chien-Chang Huang, Yu-Wei Ting | 2004-02-17 |