Issued Patents 2004
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825053 | Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS | Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang | 2004-11-30 |
| 6812487 | Test key and method for validating the doping concentration of buried layers within a deep trench capacitors | Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang, Tse-Main Kuo | 2004-11-02 |
| 6693834 | Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices | Tie Jiang Wu, Yu-Wei Ting, Bo Ching Jiang | 2004-02-17 |