Issued Patents 2004
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6833291 | Semiconductor processing methods | — | 2004-12-21 |
| 6818496 | Silicon on insulator DRAM process utilizing both fully and partially depleted devices | John K. Zahurak | 2004-11-16 |
| 6808982 | Method of reducing electrical shorts from the bit line to the cell plate | Kunal R. Parekh, Jeffrey W. Honeycutt | 2004-10-26 |
| 6791102 | Phase change memory | Brian G. Johnson | 2004-09-14 |
| 6790732 | Self-aligned dual-gate transistor device and method of forming self-aligned dual-gate transistor device | John K. Zahurak, Brent Keeth | 2004-09-14 |
| 6778453 | METHOD OF STORING A TEMPERATURE THRESHOLD IN AN INTEGRATED CIRCUIT, METHOD OF MODIFYING OPERATION OF DYNAMIC RANDOM ACCESS MEMORY IN RESPONSE TO TEMPERATURE, PROGRAMMABLE TEMPERATURE SENSING CIRCUIT AND MEMORY INTEGRATED CIRCUIT | Christopher B. Cooper, Ming-Bo Liu, Chris G. Martin, Troy A. Manning, Stephen L. Casper +3 more | 2004-08-17 |
| 6770927 | Structures comprising transistor gates | Chih-Chen Cho, Richard H. Lane | 2004-08-03 |
| 6759285 | Methods of forming transistors | Monte Manning | 2004-07-06 |
| 6757200 | Semiconductor memory having dual port cell supporting hidden refresh | Brent Keeth | 2004-06-29 |
| 6753241 | Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry | — | 2004-06-22 |
| 6744088 | Phase change memory device on a planar composite layer | — | 2004-06-01 |
| 6710420 | Semiconductor construction of a trench | David Dickerson, Richard H. Lane, Kunal R. Parekh, Mark Fischer, John K. Zahurak | 2004-03-23 |
| 6696355 | Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory | — | 2004-02-24 |
| 6693014 | Method of improving static refresh | Mark Fischer, Fawad Ahmed, Richard H. Lane, John K. Zahurak, Kunal R. Parekh | 2004-02-17 |
| 6689649 | Methods of forming transistors | Monte Manning | 2004-02-10 |
| 6677650 | Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications | Mark Fischer, Jigish Trivedi, Todd R. Abbott, Raymond A. Turi | 2004-01-13 |
| 6673700 | Reduced area intersection between electrode and programming element | Guy Wicker, Tyler Lowrey, Stephen J. Hudgens, Chien-Chih Chiang, Daniel Xu | 2004-01-06 |