UB

Ulrich Baur

IBM: 3 patents #575 of 5,464Top 15%
CS Cadence Design Systems: 1 patents #23 of 106Top 25%
📍 Holzgerlingen, DE: #1 of 24 inventorsTop 5%
Overall (2004): #10,846 of 270,089Top 5%
4
Patents 2004

Issued Patents 2004

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6816990 VLSI chip test power reduction Peilin Song, Timothy J. Koprowski, Franco Motika 2004-11-09
6774656 Self-test for leakage current of driver/receiver stages Otto A. Torreiter, Joseph Eckelman, David Hui 2004-08-10
6728914 Random path delay testing methodology Kevin William McCauley, William V. Huott, Mary P. Kusko, Peilin Song, Richard F. Rizzolo +1 more 2004-04-27
6725171 Self-test with split, asymmetric controlled driver output stage Otto A. Torreiter, Joseph Eckelman, David Hui 2004-04-20