Issued Patents 2004
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825102 | Method of improving the quality of defective semiconductor material | Keith E. Fogel, Shreesh Narasimha, Devendra K. Sadana | 2004-11-30 |
| 6805962 | Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications | Jack O. Chu, Keith E. Fogel, Steven J. Koester, Devendra K. Sadana, John A. Ott | 2004-10-19 |
| 6803240 | Method of measuring crystal defects in thin Si/SiGe bilayers | Keith E. Fogel, Devendra K. Sadana | 2004-10-12 |