LF

L. Farnsworth

IBM: 2 patents #982 of 5,464Top 20%
CS Cadence Design Systems: 1 patents #23 of 106Top 25%
📍 Middlebury, VT: #1 of 6 inventorsTop 20%
🗺 Vermont: #50 of 538 inventorsTop 10%
Overall (2004): #25,068 of 270,089Top 10%
3
Patents 2004

Issued Patents 2004

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6782501 System for reducing test data volume in the testing of logic products Frank Distler, Andrew Ferko, Brion Keller, Bernd Koenemann 2004-08-24
6768694 Method of electrically blowing fuses under control of an on-chip tester interface apparatus Darren L. Anand, Bruce Cowan, Pamela S. Gillis, Peter O. Jakobsen, Krishnendu Mondal +3 more 2004-07-27
6708305 Deterministic random LBIST Brion Keller, Bernd Koenemann, Timothy J. Koprowski, Thomas J. Snethen, Donald L. Wheater 2004-03-16