Issued Patents 2004
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6835614 | Damascene double-gate MOSFET with vertical channel regions | Jeffrey J. Brown, Wesley C. Natzle | 2004-12-28 |
| 6835633 | SOI wafers with 30-100 å buried oxide (BOX) created by wafer bonding using 30-100 å thin oxide as bonding layer | Diane C. Boyd, Erin C. Jones, Dominic J. Schepis, Leathen Shi | 2004-12-28 |
| 6815296 | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control | Robert H. Dennard, Wilfried E. Haensch | 2004-11-09 |
| 6812527 | Method to control device threshold of SOI MOSFET's | Robert H. Dennard, Wilfried E. Haensch | 2004-11-02 |
| 6686630 | Damascene double-gate MOSFET structure and its fabrication method | Erin C. Jones, Cheruvu Murthy, Philip J. Oldiges, Leathen Shi | 2004-02-03 |