Issued Patents 2003
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6661060 | Low capacitance ESD protection device | Kuo-Reay Peng, Shih-Chyi Wong | 2003-12-09 |
| 6653709 | CMOS output circuit with enhanced ESD protection using drain side implantation | Yi-Hsu Wu, Hung-Der Su, Boon-Khim Liew | 2003-11-25 |
| 6645820 | Polycrystalline silicon diode string for ESD protection of different power supply connections | Kuo-Reay Peng, Shui-Hung Chen | 2003-11-11 |
| 6614078 | Highly latchup-immune CMOS I/O structures | Jiaw-Ren Shih, Shui-Hung Chen, Ping Lung Liao | 2003-09-02 |
| 6614693 | Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM | Kuo-Reay Peng, Shui-Hung Chen, Jiaw-Ren Shih | 2003-09-02 |
| 6611028 | Dynamic substrate-coupled electrostatic discharging protection circuit | Tao Cheng, Lin-June Wu | 2003-08-26 |
| 6610262 | Depletion mode SCR for low capacitance ESD input protection | Kuo-Reay Peng | 2003-08-26 |
| 6590262 | High voltage ESD protection device with very low snapback voltage | Jyh-Min Jiang, Kuo-Chio Liu, Ruey-Hsin Liu | 2003-07-08 |
| 6582997 | ESD protection scheme for outputs with resistor loading | Shui-Hun Chen, Jiaw-Ren Shih | 2003-06-24 |
| 6576934 | Embedded SCR protection device for output and input pad | Tao Cheng | 2003-06-10 |
| 6552372 | Integrated circuit having improved ESD protection | Yi-Hsun Wu, Shui-Hung Chen, Jian-Ren Shih | 2003-04-22 |
| 6541824 | Modified source side inserted anti-type diffusion ESD protection device | Jiaw-Ren Shih, Shui-Hung Chen, Yi-Hsun Wu | 2003-04-01 |