Issued Patents 2003
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6667217 | Method of fabricating a damascene copper inductor structure using a sub-0.18 um CMOS process | Heng-Ming Hsu, Jau-Yuann Chung, Yen-Shih Ho, Chun-Hon Chen, Ta-Hsun Yeh +2 more | 2003-12-23 |
| 6661060 | Low capacitance ESD protection device | Jian-Hsing Lee, Shih-Chyi Wong | 2003-12-09 |
| 6645820 | Polycrystalline silicon diode string for ESD protection of different power supply connections | Jian-Hsing Lee, Shui-Hung Chen | 2003-11-11 |
| 6614693 | Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM | Jian-Hsing Lee, Shui-Hung Chen, Jiaw-Ren Shih | 2003-09-02 |
| 6610262 | Depletion mode SCR for low capacitance ESD input protection | Jian-Hsing Lee | 2003-08-26 |