Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6607967 | Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate | Jayanthi Pallinti, Dawn M. Lee | 2003-08-19 |
| 6586326 | Metal planarization system | Jayanthi Pallinti, Samuel V. Dunton | 2003-07-01 |
| 6531397 | Method and apparatus for using across wafer back pressure differentials to influence the performance of chemical mechanical polishing | Dawn M. Lee | 2003-03-11 |
| 6503828 | Process for selective polishing of metal-filled trenches of integrated circuit structures | James J. Xie, Akihisa Ueno, Jayanthi Pallinti | 2003-01-07 |