Issued Patents 2002
Showing 1–25 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498362 | Weak ferroelectric transistor | Kie Y. Ahn | 2002-12-24 |
| 6498065 | Memory address decode array with vertical transistors | Wendell P. Noble | 2002-12-24 |
| 6496034 | Programmable logic arrays with ultra thin body transistors | Kie Y. Ahn | 2002-12-17 |
| 6495955 | Structure and method for improved field emitter arrays | Kie Y. Ahn | 2002-12-17 |
| 6496370 | Structure and method for an electronic assembly | Joseph E. Geusic, Kie Y. Ahn | 2002-12-17 |
| 6495436 | Formation of metal oxide gate dielectric | Kie Y. Ahn | 2002-12-17 |
| 6492233 | Memory cell with vertical transistor and buried word and body lines | Wendell P. Noble, Kie Y. Ahn | 2002-12-10 |
| 6492694 | Highly conductive composite polysilicon gate for CMOS integrated circuits | Wendell P. Noble | 2002-12-10 |
| 6486027 | Field programmable logic arrays with vertical transistors | Wendell P. Noble | 2002-11-26 |
| 6486703 | Programmable logic array with vertical transistors | Wendell P. Noble | 2002-11-26 |
| 6483171 | Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same | Wendell P. Noble, Alan R. Reinberg | 2002-11-19 |
| 6476441 | Method and structure for textured surfaces in floating gate tunneling oxide devices | Joseph E. Geusic | 2002-11-05 |
| 6476434 | 4 F2 folded bit line dram cell structure having buried bit and word lines | Wendell P. Noble, Kie Y. Ahn | 2002-11-05 |
| 6472939 | Low power supply CMOS differential amplifier topology | — | 2002-10-29 |
| 6469582 | Voltage tunable active inductorless filter | — | 2002-10-22 |
| 6465375 | Single electron MOSFET memory device and method | Kie Y. Ahn | 2002-10-15 |
| 6465298 | Method of fabricating a semiconductor-on-insulator memory cell with buried word and body lines | Kie Y. Ahn | 2002-10-15 |
| 6462582 | Clocked pass transistor and complementary pass transistor logic circuits | — | 2002-10-08 |
| 6454912 | Method and apparatus for the fabrication of ferroelectric films | Kie Y. Ahn | 2002-09-24 |
| 6456157 | Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits | Kie Y. Ahn | 2002-09-24 |
| 6456535 | Dynamic flash memory cells with ultra thin tunnel oxides | Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar +2 more | 2002-09-24 |
| 6452831 | Single electron resistor memory device and method | Kie Y. Ahn | 2002-09-17 |
| 6452839 | Method for erasing data from a single electron resistor memory | Kie Y. Ahn | 2002-09-17 |
| 6452856 | DRAM technology compatible processor/memory chips | Eugene H. Cloud, Wendell P. Noble | 2002-09-17 |
| 6446327 | Integrated circuit inductors | Kie Y. Ahn | 2002-09-10 |