Issued Patents 2002
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6496370 | Structure and method for an electronic assembly | Leonard Forbes, Kie Y. Ahn | 2002-12-17 |
| 6476441 | Method and structure for textured surfaces in floating gate tunneling oxide devices | Leonard Forbes | 2002-11-05 |
| 6456535 | Dynamic flash memory cells with ultra thin tunnel oxides | Leonard Forbes, Luan C. Tran, Alan R. Reinberg, Kie Y. Ahn, Paul A. Farrar +2 more | 2002-09-24 |
| 6451685 | Method for multilevel copper interconnects for ultra large scale integration | Kie Y. Ahn | 2002-09-17 |
| 6423613 | Low temperature silicon wafer bond process with bulk material bond strength | — | 2002-07-23 |
| 6383924 | Method of forming buried conductor patterns by surface transformation of empty spaces in solid state materials | Paul A. Farrar | 2002-05-07 |
| 6356500 | Reduced power DRAM device and method | Eugene H. Cloud, Kie Y. Ahn, Leonard Forbes, Paul A. Farrar, Kevin G. Donohoe +3 more | 2002-03-12 |
| 6351411 | Memory using insulator traps | Leonard Forbes | 2002-02-26 |
| 6348125 | Removal of copper oxides from integrated interconnects | Alan R. Reinberg | 2002-02-19 |