Issued Patents 2002
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6492662 | T-RAM structure having dual vertical devices and method for fabricating the same | Louis L. Hsu | 2002-12-10 |
| 6456521 | Hierarchical bitline DRAM architecture system | Louis L. Hsu | 2002-09-24 |
| 6452855 | DRAM array interchangeable between single-cell and twin-cell array operation | Louis L. Hsu, John A. Fifield, Wayne F. Ellis | 2002-09-17 |
| 6444565 | Dual-rie structure for via/line interconnections | Christopher Adam Feild, Roy Iggulden, Edward W. Kiewra | 2002-09-03 |
| 6445626 | Column redundancy architecture system for an embedded DRAM | Louis L. Hsu, Gregory J. Fredeman | 2002-09-03 |
| 6445638 | Folded-bitline dual-port DRAM architecture system | Louis L. Hsu, Radens Carl | 2002-09-03 |
| 6442735 | SOI circuit design method | Karl-Eugen Kroell | 2002-08-27 |
| 6433436 | Dual-RIE structure for via/line interconnections | Christopher Adam Feild, Roy Iggulden, Edward W. Kiewra | 2002-08-13 |
| 6396324 | Clock system for an embedded semiconductor memory unit | Louis L. Hsu, Richard Michael Parent, Matthew R. Wordeman | 2002-05-28 |
| 6337595 | Low-power DC voltage generator system | Louis L. Hsu, Russell J. Houghton, Wayne F. Ellis, Jeffrey H. Dreibelbis | 2002-01-08 |
| 6335569 | Soft metal conductor and method of making | — | 2002-01-01 |