Issued Patents 2002
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6472757 | Conductor reservoir volume for integrated circuit interconnects | Amit P. Marathe, Christy Mei-Chu Woo | 2002-10-29 |
| 6469385 | Integrated circuit with dielectric diffusion barrier layer formed between interconnects and interlayer dielectric layers | Steven C. Avanzino, Minh Van Ngo | 2002-10-22 |
| 6462417 | Coherent alloy diffusion barrier for integrated circuit interconnects | Amit P. Marathe, Minh Van Ngo, Suzette K. Pangrle | 2002-10-08 |
| 6462416 | Gradated barrier layer in integrated circuit interconnects | Amit P. Marathe, Christy Mei-Chu Woo | 2002-10-08 |
| 6455938 | Integrated circuit interconnect shunt layer | Amit P. Marathe, Christy Mei-Chu Woo | 2002-09-24 |
| 6447933 | Formation of alloy material using alternating depositions of alloy doping element and bulk material | Sergey Lopatin | 2002-09-10 |
| 6445070 | Coherent carbide diffusion barrier for integrated circuit interconnects | Amit P. Marathe, Minh Van Ngo, Suzette K. Prangrle | 2002-09-03 |
| 6433402 | Selective copper alloy deposition | Christy Mei-Chu Woo, Amit P. Marathe, Diana M. Schonauer | 2002-08-13 |
| 6426293 | Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant | Sergey Lopatin, Amit P. Marathe | 2002-07-30 |
| 6417566 | Void eliminating seed layer and conductor core integrated circuit interconnects | Amit P. Marathe | 2002-07-09 |
| 6417100 | Annealing ambient in integrated circuit interconnects | Steven C. Avanzino, Minh Van Ngo | 2002-07-09 |
| 6403474 | Controlled anneal conductors for integrated circuit interconnects | Steven C. Avanzino, Minh Van Ngo | 2002-06-11 |
| 6387806 | Filling an interconnect opening with different types of alloys to enhance interconnect reliability | Christy Mei-Chu Woo | 2002-05-14 |
| 6358840 | Forming and filling a recess in interconnect with alloy to minimize electromigration | Christy Mei-Chu Woo | 2002-03-19 |
| 6346479 | Method of manufacturing a semiconductor device having copper interconnects | Christy Mei-Chu Woo | 2002-02-12 |