Issued Patents 2002
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498397 | Seed layer with annealed region for integrated circuit interconnects | Krishnashree Achuthan | 2002-12-24 |
| 6498384 | Structure and method of semiconductor via testing | — | 2002-12-24 |
| 6476498 | Elimination of flux divergence in integrated circuit interconnects | — | 2002-11-05 |
| 6472757 | Conductor reservoir volume for integrated circuit interconnects | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-10-29 |
| 6462416 | Gradated barrier layer in integrated circuit interconnects | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-10-08 |
| 6462417 | Coherent alloy diffusion barrier for integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo, Suzette K. Pangrle | 2002-10-08 |
| 6455938 | Integrated circuit interconnect shunt layer | Pin-Chin Connie Wang, Christy Mei-Chu Woo | 2002-09-24 |
| 6445070 | Coherent carbide diffusion barrier for integrated circuit interconnects | Pin-Chin Connie Wang, Minh Van Ngo, Suzette K. Prangrle | 2002-09-03 |
| 6433402 | Selective copper alloy deposition | Christy Mei-Chu Woo, Pin-Chin Connie Wang, Diana M. Schonauer | 2002-08-13 |
| 6432822 | Method of improving electromigration resistance of capped Cu | Minh Van Ngo, Steven C. Avanzino | 2002-08-13 |
| 6426293 | Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant | Pin-Chin Connie Wang, Sergey Lopatin | 2002-07-30 |
| 6417566 | Void eliminating seed layer and conductor core integrated circuit interconnects | Pin-Chin Connie Wang | 2002-07-09 |
| 6348701 | Method for determining metal concentration in a field area | Young-Chang Joo | 2002-02-19 |