Issued Patents 1997
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5696937 | Cache controller utilizing a state machine for controlling invalidations in a network with dual system busses | Theodore C. White | 1997-12-09 |
| 5666515 | Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address | Theodore C. White, Kha Nguyen, Dan T. Tran | 1997-09-09 |