Issued Patents 1997
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5696937 | Cache controller utilizing a state machine for controlling invalidations in a network with dual system busses | Jayesh V. Sheth | 1997-12-09 |
| 5673415 | High speed two-port interface unit where read commands suspend partially executed write commands | Kha Nguyen, Bruce Edward Moolenaar | 1997-09-30 |
| 5666515 | Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address | Jayesh V. Sheth, Kha Nguyen, Dan T. Tran | 1997-09-09 |