Issued Patents 1997
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5666515 | Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address | Theodore C. White, Jayesh V. Sheth, Kha Nguyen | 1997-09-09 |
| 5598421 | Method and system for tracking the state of each one of multiple JTAG chains used in testing the logic of intergrated circuits | Wayne C. Datwyler, Long Ha | 1997-01-28 |