Issued Patents 1997
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5686336 | Method of manufacture of four transistor SRAM cell layout | — | 1997-11-11 |
| 5674770 | Method of fabricating an SRAM device with a self-aligned thin film transistor structure | Shou-Gwo Wuu | 1997-10-07 |
| 5672896 | Three stage ESD protection device | Mong-Song Liang | 1997-09-30 |
| 5672538 | Modified locus isolation process in which surface topology of the locos oxide is smoothed | Jhon Jhy Liaw, Sou-Wein Kuo | 1997-09-30 |
| 5665657 | Spin-on-glass partial etchback planarization process | — | 1997-09-09 |
| 5654231 | Method of eliminating buried contact trench in SRAM technology | Mong-Song Liang, Chun-Yi Shih | 1997-08-05 |
| 5614430 | Anti-punchthrough ion implantation for sub-half micron channel length MOSFET devices | Mong-Song Liang | 1997-03-25 |
| 5610081 | Integrated circuit module fixing method for temperature cycling test | King-Ho Ping | 1997-03-11 |
| 5605853 | Method of making a semiconductor device having 4 transistor SRAM and floating gate memory cells | Chue-San Yoo, Mong-Song Liang | 1997-02-25 |
| 5593911 | Method of making ESD protection circuit with three stages | Mong-Song Liang | 1997-01-14 |
| 5591664 | Method of increasing the capacitance area in DRAM stacked capacitors using a simplified process | Chen-Jong Wang | 1997-01-07 |