Issued Patents 1997
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5698876 | Memory standard cell macro for semiconductor device | Shinji Miyano, Katsuhiko Sato, Kenji Numata | 1997-12-16 |
| 5659507 | Clock synchronous type DRAM with data latch | Kenji Numata, Katsuhiko Sato, Ryo Haga, Shinji Miyano, Tohru Furuyama | 1997-08-19 |
| 5640351 | Semiconductor memory circuit having data buses common to a plurality of memory cell arrays | Shinji Miyano, Katsuhiko Sato, Kenji Numata | 1997-06-17 |
| 5640365 | Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency | Keniti Imamiya, Shinji Miyano, Katsuhiko Sato | 1997-06-17 |
| 5608674 | Semiconductor memory device | Kenji Numata | 1997-03-04 |