Issued Patents 1997
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5698876 | Memory standard cell macro for semiconductor device | Tomoaki Yabe, Shinji Miyano, Katsuhiko Sato | 1997-12-16 |
| 5659507 | Clock synchronous type DRAM with data latch | Tomoaki Yabe, Katsuhiko Sato, Ryo Haga, Shinji Miyano, Tohru Furuyama | 1997-08-19 |
| 5640351 | Semiconductor memory circuit having data buses common to a plurality of memory cell arrays | Tomoaki Yabe, Shinji Miyano, Katsuhiko Sato | 1997-06-17 |
| 5633827 | Semiconductor integrated circuit device allowing change of product specification and chip screening method therewith | Masaki Ogihara | 1997-05-27 |
| 5608674 | Semiconductor memory device | Tomoaki Yabe | 1997-03-04 |
| 5594265 | Input protection circuit formed in a semiconductor substrate | Mitsuru Shimizu, Syuso Fujii, Masaharu Wada | 1997-01-14 |