Issued Patents 1997
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5694553 | Method and apparatus for determining the dispatch readiness of buffered load operations in a processor | Kris G. Konigsfeld | 1997-12-02 |
| 5680572 | Cache memory system having data and tag arrays and multi-purpose buffer assembly with multiple line buffers | Haitham Akkary, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more | 1997-10-21 |
| 5671444 | Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers | Haitham Akkary, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more | 1997-09-23 |
| 5664137 | Method and apparatus for executing and dispatching store operations in a computer system | Haitham Akkary, Atig A. Bajwa, Michael A. Fetterman, Andrew F. Glew, Glenn J. Hinton +4 more | 1997-09-02 |
| 5635862 | High-speed block id encoder circuit using dynamic logic | Bryon Conley, Borislav Agapiev | 1997-06-03 |
| 5606670 | Method and apparatus for signalling a store buffer to output buffered store data for a load operation on an out-of-order execution computer system | Haitham Akkary, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +1 more | 1997-02-25 |