TY

Takahisa Yamaha

Yamaha: 30 patents #36 of 2,001Top 2%
Rohm Co.: 4 patents #677 of 2,292Top 30%
Overall (All Time): #103,817 of 4,157,543Top 3%
34
Patents All Time

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #TitleCo-InventorsDate
8237221 Semiconductor device and method of manufacturing semiconductor device Ryotaro Yagi, Isamu Nishimura 2012-08-07
8164160 Semiconductor device Yuichi Nakao 2012-04-24
8125084 Semiconductor device and semiconductor device manufacturing method Ryosuke Nakagawa, Yuichi Nakao, Katsumi Sameshima, Satoshi Kageyama 2012-02-28
8022472 Semiconductor device and method of manufacturing semiconductor device Ryotaro Yagi, Isamu Nishimura 2011-09-20
7211902 Method of forming a bonding pad structure 2007-05-01
7067928 Method of forming a bonding pad structure 2006-06-27
6921714 Method for manufacturing a semiconductor device 2005-07-26
6888183 Manufacture method for semiconductor device with small variation in MOS threshold voltage 2005-05-03
6555465 Multi-layer wiring structure of integrated circuit and manufacture of multi-layer wiring 2003-04-29
6541373 Manufacture method for semiconductor with small variation in MOS threshold voltage 2003-04-01
6297563 Bonding pad structure of semiconductor device 2001-10-02
6251805 Method of fabricating semiconductor device Yushi Inoue 2001-06-26
6150720 Semiconductor device having manufacturing wiring structure with buried plugs Tetsuya Kuwajima 2000-11-21
6146998 Method of manufacturing wiring structure having buried plugs in semiconductor device, and semiconductor device Tetsuya Kuwajima 2000-11-14
6080652 Method of fabricating a semiconductor device having a multi-layered wiring Seiji Hirade 2000-06-27
6060390 Method of forming wiring layer Masaru Naito 2000-05-09
5997754 Method of fabricating multi-layered wiring Masaru Naito 1999-12-07
5998814 Semiconductor device and fabrication method thereof Seiji Hirade 1999-12-07
5904576 Method of forming wiring structure Yushi Inoue 1999-05-18
5885857 Semiconductor chip capable of suppressing cracks in the insulating layer Yushi Inoue, Masaru Naito 1999-03-23
5821162 Method of forming multi-layer wiring utilizing SOG Yushi Inoue 1998-10-13
5793110 MOS transistor with good hot carrier resistance and low interface state density Seiji Hirade 1998-08-11
5786638 Semiconductor device with moisture impervious film 1998-07-28
5786625 Moisture resistant semiconductor device 1998-07-28
5763936 Semiconductor chip capable of supressing cracks in insulating layer Yushi Inoue, Masaru Naito 1998-06-09