Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11672819 | Polysaccharide carbon nanogels and anticoagulants and antioxidants comprising the same | Ju-Yi Mao, Han-Jia Lin | 2023-06-13 |
| 10714528 | Chip package and manufacturing method thereof | Hsin Kuan, Shih-Kuang Chen, Chia-Ming Cheng | 2020-07-14 |
| 10347616 | Chip package and manufacturing method thereof | Hsin Kuan, Chia-Ming Cheng | 2019-07-09 |
| 7884467 | Package structure of a microphone | Jiung-Yue Tien, Hsi-Chen Yang | 2011-02-08 |
| 7511373 | Cap package for micro electro-mechanical system | Jiung-Yue Tien, Ming-Te Tu | 2009-03-31 |
| 6047467 | Printed circuit board layout to minimize the clock delay caused by mismatch in length of metal lines and enhance the thermal performance of microelectronics packages via conduction through the package leads | Ahmad Hamzehdoost | 2000-04-11 |
| 5742009 | Printed circuit board layout to minimize the clock delay caused by mismatch in length of metal lines and enhance the thermal performance of microeletronics packages via condution through the package leads | Ahmad Hamzehdoost | 1998-04-21 |
| 5641988 | Multi-layered, integrated circuit package having reduced parasitic noise characteristics | Sang S. Lee, Ramachandra A. Rao, Fernand N. Forcier, Jr. | 1997-06-24 |
| 5625225 | Multi-layered, integrated circuit package having reduced parasitic noise characteristics | Sang S. Lee, Ramachandra A. Rao, Fernand N. Forcier, Jr. | 1997-04-29 |
| 5371321 | Package structure and method for reducing bond wire inductance | Ahmad Hamzehdoost | 1994-12-06 |
| 5371403 | High performance package using high dielectric constant materials for power/ground and low dielectric constant materials for signal lines | Elizabeth C. Galindo | 1994-12-06 |
| 5302022 | Technique for measuring thermal resistance of semiconductor packages and materials | Kenny Y. Ng | 1994-04-12 |
| 5259545 | Apparatus for bonding a semiconductor die to a package using a gold/silicon preform and cooling the die and package through a monotonically decreasing temperature sequence | — | 1993-11-09 |
| 5188982 | Method of bonding a semiconductor die to a package using a gold/silicon preform and cooling the die and package through a monotonically decreasing temperature sequence | — | 1993-02-23 |
| 5172471 | Method of providing power to an integrated circuit | — | 1992-12-22 |
| 5138431 | Lead and socket structures with reduced self-inductance | Ronald J. Molnar | 1992-08-11 |