AN

Amos Noy

VE Verisity: 3 patents #3 of 7Top 45%
CI Cadence Design (Israel) Ii: 2 patents #1 of 8Top 15%
CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Overall (All Time): #747,064 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8296697 Method and apparatus for performing static analysis optimization in a design verification system Amit Gal, Shlomi Uziel 2012-10-23
7870523 System and method for test generation with dynamic constraints using static analysis and multidomain constraint reduction Shlomi Uziel, Vitaly Lagoon, Yael Kinderman, Amit Gal 2011-01-11
7281185 Method and apparatus for maximizing and managing test coverage Uri Joel Maoz 2007-10-09
7114111 Method and apparatus for maximizing test coverage 2006-09-26
6684359 System and method for test generation with dynamic constraints using static analysis 2004-01-27
6519727 System and method for applying flexible constraints 2003-02-11
6219809 System and method for applying flexible constraints 2001-04-17