Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8305789 | Memory/logic conjugate system | Kanji Otsuka, Tsuneo Ito, Yoichi Sato, Masahiro Yoshida, Shigeru Yamamoto +2 more | 2012-11-06 |
| 7804111 | Semiconductor device and method for adjusting characteristics thereof | Kanji Otsuka, Munekazu Takano, Fumio Mizuno, Saburo Yokokura, Tsuneo Ito +1 more | 2010-09-28 |
| 7791852 | Electrostatic discharge protection circuit and terminating resistor circuit | Kanji Otsuka, Tamotsu Usami, Yutaka Akiyama, Tsuneo Ito | 2010-09-07 |