SB

Swarup Bhunia

University of Florida: 32 patents #7 of 2,560Top 1%
CU Case Western Reserve University: 4 patents #163 of 1,377Top 15%
PF Purdue Research Foundation: 2 patents #773 of 3,174Top 25%
CU Case Western University: 1 patents #2 of 25Top 8%
ST Stc.Unm: 1 patents #276 of 604Top 50%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 Gainesville, FL: #23 of 2,267 inventorsTop 2%
🗺 Florida: #853 of 67,251 inventorsTop 2%
Overall (All Time): #80,645 of 4,157,543Top 2%
39
Patents All Time

Issued Patents All Time

Showing 26–39 of 39 patents

Patent #TitleCo-InventorsDate
11183068 Multi-purpose context-aware bump (CAB) supporting dynamic adaptation of form factors and functionality Prabuddha Chakraborty, Lili DU, Sandip Ray 2021-11-23
11144648 Trojan insertion tool Jonathan William Cruz, Prabhat Kumar Mishra 2021-10-12
11017125 Uniquified FPGA virtualization approach to hardware security Greg M. Stitt, Kai Yang, Robert Karam 2021-05-25
10837926 Multi-modal spectroscopic analysis Soumyajit Mandal, Naren Vikram Raj Masna, Cheng Chen, Mason Greer, Fengchao Zhang 2020-11-17
10586135 Nano-electro-mechanical labels and encoder Roozbeh Tabrizian 2020-03-10
10521600 Reconfigurable system-on-chip security architecture Atul Prasad Deb Nath 2019-12-31
10283459 Vanishing via for hardware IP protection from reverse engineering Haoting Shen, Mark M. Tehranipoor, Domenic J. Forte, Navid Asadizanjani 2019-05-07
10216965 Systems and methods for generating physically unclonable functions from non-volatile memory cells James Plusquellic 2019-02-26
9685958 Defense against counterfeiting using antifuses Abhishek Basak, Yu Zheng 2017-06-20
9628086 Nanoelectromechanical antifuse and related systems Ting He, Fengchao Zhang, Philip X.L. Feng 2017-04-18
8402401 Protection of intellectual property cores through a design flow Rajat Subhra Chakraborty, Seetharam Narasimhan 2013-03-19
7548473 Apparatus and methods for determining memory device faults Qikai Chen, Hamid Mahmoodi, Kaushik Roy 2009-06-16
7454738 Synthesis approach for active leakage power reduction using dynamic supply gating Nilanjan Banerjee, Hamid Mahmoodi, Qikai Chen, Kaushik Roy 2008-11-18
7319343 Low power scan design and delay fault testing technique using first level supply gating Hamid Mahmoodi, Arijit Raychowhury, Saibal Mukhopadhyay, Kaushik Roy 2008-01-15